29 Dec
2017
29 Dec
'17
10:38 p.m.
On Fri, Dec 29, 2017 at 04:04:01AM -0700, Kevin Bowling wrote:
Alpha generally maintained integer/ALU and clockspeed
leadership for
most of the '90s
http://www.cs.columbia.edu/~sedwards/classes/2012/3827-spring/advanced-arch…
Wow, that first graph is the most misleading graph on CPU performance
I've ever seen. Ever.
So from 1993 to 2000 the only CPUs released were Alphas?
That era was when I was busy measuring performance across cpus and
operating systems and I don't ever remember any processor being a
factor of 2 better than its peers. And maybe I missed it, I only
owned a couple of alpha systems, but I never saw an Alpha that was
a game changer. Alpha was cool but it was too little, too late to
save DEC.
In that time period, even more so now, you had to be 2x better to get
a customer to switch to your platform.
2x cheaper
2x faster
2x more reliable
Do one of those and people would consider switching platforms. Less than
that was really tough and it was always, so far as I remember, less than
that. SMP might be an exception but we went through that whole learning
process of "well, we advertised symmetric but when we said that what we
really meant was you should lock your processes down to a processor
because caches turn out to matter". So in theory, N processors were N
times faster than 1 but in practice not so much.
I was very involved in performance work and cpu architecture and I'd love
to be able to claim that we had a 2x faster CPU than someone else but we
didn't, not at Sun and not at SGI.
It sort of make sense that there weren't huge gaps, everyone was more or
less using the same sized transistors, the same dram, the same caches.
There were variations, Intel had/has the biggest and most advanced
foundries but IBM would push the state of the art, etc. But I don't
remember anyone ever coming out with a chip that was 2x faster. I
suspect you can find one where chip A is introduced at the end of chip
B's lifespan and A == 2*B but wait a few month's and B gets replaced
and A == .9*C.
Can anyone point to a 2x faster than it's current peers chip introduction?
Am I just not remembering one or is that not a thing?
--lm
30 Dec
30 Dec
5:54 a.m.
New subject: Why did PDPs become so popular?
I trust your judgement and experience WRT the Alpha.
If you're looking for massive performance deltas, what about ECL
designs like the IBM 3090 and Cray designs in the late '80s/ early
'90s? I believe those were not a multiple but a magnitude faster than
contemporaries.
Regards,
On Fri, Dec 29, 2017 at 9:38 AM, Larry McVoy <lm(a)mcvoy.com> wrote:
On Fri, Dec 29, 2017 at 04:04:01AM -0700, Kevin
Bowling wrote:
Alpha generally maintained integer/ALU and
clockspeed leadership for
most of the '90s
http://www.cs.columbia.edu/~sedwards/classes/2012/3827-spring/advanced-arch…
Wow, that first graph is the most misleading graph on CPU performance
I've ever seen. Ever.
So from 1993 to 2000 the only CPUs released were Alphas?
That era was when I was busy measuring performance across cpus and
operating systems and I don't ever remember any processor being a
factor of 2 better than its peers. And maybe I missed it, I only
owned a couple of alpha systems, but I never saw an Alpha that was
a game changer. Alpha was cool but it was too little, too late to
save DEC.
In that time period, even more so now, you had to be 2x better to get
a customer to switch to your platform.
2x cheaper
2x faster
2x more reliable
Do one of those and people would consider switching platforms. Less than
that was really tough and it was always, so far as I remember, less than
that. SMP might be an exception but we went through that whole learning
process of "well, we advertised symmetric but when we said that what we
really meant was you should lock your processes down to a processor
because caches turn out to matter". So in theory, N processors were N
times faster than 1 but in practice not so much.
I was very involved in performance work and cpu architecture and I'd love
to be able to claim that we had a 2x faster CPU than someone else but we
didn't, not at Sun and not at SGI.
It sort of make sense that there weren't huge gaps, everyone was more or
less using the same sized transistors, the same dram, the same caches.
There were variations, Intel had/has the biggest and most advanced
foundries but IBM would push the state of the art, etc. But I don't
remember anyone ever coming out with a chip that was 2x faster. I
suspect you can find one where chip A is introduced at the end of chip
B's lifespan and A == 2*B but wait a few month's and B gets replaced
and A == .9*C.
Can anyone point to a 2x faster than it's current peers chip introduction?
Am I just not remembering one or is that not a thing?
--lm
6:04 a.m.
New subject: Why did PDPs become so popular?
On Fri, Dec 29, 2017 at 04:54:25PM -0700, Kevin Bowling wrote:
I trust your judgement and experience WRT the Alpha.
If you're looking for massive performance deltas, what about ECL
designs like the IBM 3090 and Cray designs in the late '80s/ early
'90s? I believe those were not a multiple but a magnitude faster than
contemporaries.
For vector operations, yes. For stuff that you and I care about,
running the OS, serving up data, not so much.
As I recall, the supercomputers were pretty crappy on anything that
wasn't a vector operation. I helped port Unix to a CDC spinoff, the
ETA-10, and it was faster to cross compile stuff on a Sun 3/280 than
compile it natively.
I haven't run on either the 3090 or the Crays but I've got friends who
did (some of whom still work at Cray) and when I was crowing about what
I could do a Sun nobody told me that it was faster on a cray.
If you were doing scalar floating point, especially at the larger
precisions, yeah, the super computers were better. If you were doing
that sort of thing as a vector, so a vector of 128 bit floats, yeah,
I could imagine that could be a lot faster than a Sun.
SGI did a tick/tock where it was floating point focus, then integer focus.
It's possible that one of their floating point designs kept pace with the
super computers, I know that they went to the super computing conference
each year (I did the power wall over NFS at one). But I don't know much
about floating point, never use it in my code :)
--lm
6:54 a.m.
New subject: Why did PDPs become so popular?
I'll chime in just to say that designing with ECL was one hell of a lot of fun
compared to TTL.
The first Alpha chip (EV3) had pad drivers that could be configured for TTL levels or for
ECL levels. In fact, a good chunk of the ISSCC paper is about the pad driver.
I was part of the team that built the first Alpha machine, the Alpha Demonstration Unit,
see
ftp://ftp.linux-mips.org/pub/linux/mips/people/macro/DEC/DTJ/DTJ803/DTJ803P…
<ftp://ftp.linux-mips.org/pub/linux/mips/people/macro/DEC/DTJ/DTJ803/DTJ803PF.PDF>
For a limited number of machines, with power no object we were able to make an unabashed
ECL design using the ECL 100K logic family, the ECLinPS family (300 ps gate delays) and
some custom Gigabit Logic Gallium Arsenide parts for the memory board address line
drivers.
We got power supply cables from a local valley welding shop and had them cut to length.
The shop owner wanted to know “what kind of a welder needs 18” cables?” The issue was the
400 Amps of -4.5 v. Each jelly bean chip was between 1/2 and 1 watt IIRC.
The beauty of ECL is that it is perfectly happy to drive 50 ohm transmission lines, with
shunt termination. This gives you incident wave switching and really beautiful signal
integrity. I think if Cray had tried to build the Cray 1 with anything other than ECL it
just would never have worked reliably, especially with such long wires needed.
Essentially, ECL let you build big machines with the same reliability that could only be
achieved with small machines using TTL. Great stuff if you can afford the power
consumption.
In the same way that it is worthwhile to own a sports car at least once in your life, it
was a joy to build an ECL design.
-Larry
On 2017, Dec 29, at 6:54 PM, Kevin Bowling
<kevin.bowling(a)kev009.com> wrote:
I trust your judgement and experience WRT the Alpha.
If you're looking for massive performance deltas, what about ECL
designs like the IBM 3090 and Cray designs in the late '80s/ early
'90s? I believe those were not a multiple but a magnitude faster than
contemporaries.
Regards,
7:47 a.m.
New subject: Why did PDPs become so popular?
That is awesome, thanks for the story and link. Enlightening to read
about how the coherence protocol was developed in software. How was
the ISA, and I assume even implementation detail, kept equal or close
enough to the eventual microprocessor parts? Does the "Privileged
Architecture Library" mean it was effectively microcoded? What kind
of software structure was used to provide the I/O channel on the
DECStations, for instance did it map the other TURBOChannel devices
into the demo's address space so it ran the stock device drivers, or
was the I/O server software intermediating a mailbox for doing SCSI,
Ethernet etc with a different device model?
Reminds me of a book I really liked "The Supermen: The Story of
Seymour Cray and the Technical Wizards Behind the Supercomputer",
especially Seymour Cray's willingness to throw out convention and
redefine the game. Corollary to Larry's point about CPU designers
losing by only competing against their own last design.. you can
either make new markets or lead in the ongoing one, not a lot of air
outside that.
Regards,
On Fri, Dec 29, 2017 at 5:54 PM, Lawrence Stewart <stewart(a)serissa.com> wrote:
I'll chime in just to say that designing with ECL
was one hell of a lot of
fun compared to TTL.
The first Alpha chip (EV3) had pad drivers that could be configured for TTL
levels or for ECL levels. In fact, a good chunk of the ISSCC paper is about
the pad driver.
I was part of the team that built the first Alpha machine, the Alpha
Demonstration Unit, see
ftp://ftp.linux-mips.org/pub/linux/mips/people/macro/DEC/DTJ/DTJ803/DTJ803P…
For a limited number of machines, with power no object we were able to make
an unabashed ECL design using the ECL 100K logic family, the ECLinPS family
(300 ps gate delays) and some custom Gigabit Logic Gallium Arsenide parts
for the memory board address line drivers.
We got power supply cables from a local valley welding shop and had them cut
to length. The shop owner wanted to know “what kind of a welder needs 18”
cables?” The issue was the 400 Amps of -4.5 v. Each jelly bean chip was
between 1/2 and 1 watt IIRC.
The beauty of ECL is that it is perfectly happy to drive 50 ohm transmission
lines, with shunt termination. This gives you incident wave switching and
really beautiful signal integrity. I think if Cray had tried to build the
Cray 1 with anything other than ECL it just would never have worked
reliably, especially with such long wires needed.
Essentially, ECL let you build big machines with the same reliability that
could only be achieved with small machines using TTL. Great stuff if you
can afford the power consumption.
In the same way that it is worthwhile to own a sports car at least once in
your life, it was a joy to build an ECL design.
-Larry
On 2017, Dec 29, at 6:54 PM, Kevin Bowling <kevin.bowling(a)kev009.com> wrote:
I trust your judgement and experience WRT the Alpha.
If you're looking for massive performance deltas, what about ECL
designs like the IBM 3090 and Cray designs in the late '80s/ early
'90s? I believe those were not a multiple but a magnitude faster than
contemporaries.
Regards,
8:19 a.m.
New subject: Why did PDPs become so popular?
(Both the ADU and the DECstation front end ran OSF-1 or Ultrix, which was unix-y, although
the ADU itself did run VMS as a second OS :) )
If I remember correctly, the OS running on the ADU itself had what we would now call
paravirtualized drivers - they just handed off packets or disk block I/Os to the I/O
service program running on the DECStation. The ADU device drivers just managed ring
buffers of requests, rather than raw SCSI commands destined for the real I/O devices.
PALcode is an Alpha thing, so that code running in PAL mode was responsible for things
like TLB loads that might be different from model to model. Anything that was too
expensive to implement in hardware or too infrequent to bother with got punted to PAL.
PALcode was just ordinary Alpha assembler code, sometimes written in C I imagine, but it
had to be very careful not to cause any faults or traps that required PALcode to
implement.
The EV3 was an early Alpha chip, in, I think, .9 micron CMOS, that did not have an FPU, so
the floating point was emulated. The first products were 200 MHz EV4 machines that were
in .75 micron CMOS.
The 3 and 4 refer to Digital code names for CMOS processes. The EV stands for “Electric
Vlasic” because the chip design team was fond of sticking nails into dill pickles and
plugging them into the wall. The pickles could be seen to glow in a dark room before
starting to smoke.
Ken Olsen came to visit the lab and wanted to know why we had christmas tree lights
decorating the ADU chassis. We explained it was a safety feature, to remind people the
power was on. 400 amps was nothing to fool around with. No wedding rings allowed in the
lab.
-Larry
On 2017, Dec 29, at 8:47 PM, Kevin Bowling
<kevin.bowling(a)kev009.com> wrote:
That is awesome, thanks for the story and link. Enlightening to read
about how the coherence protocol was developed in software. How was
the ISA, and I assume even implementation detail, kept equal or close
enough to the eventual microprocessor parts? Does the "Privileged
Architecture Library" mean it was effectively microcoded? What kind
of software structure was used to provide the I/O channel on the
DECStations, for instance did it map the other TURBOChannel devices
into the demo's address space so it ran the stock device drivers, or
was the I/O server software intermediating a mailbox for doing SCSI,
Ethernet etc with a different device model?
Reminds me of a book I really liked "The Supermen: The Story of
Seymour Cray and the Technical Wizards Behind the Supercomputer",
especially Seymour Cray's willingness to throw out convention and
redefine the game. Corollary to Larry's point about CPU designers
losing by only competing against their own last design.. you can
either make new markets or lead in the ongoing one, not a lot of air
outside that.
Regards,
On Fri, Dec 29, 2017 at 5:54 PM, Lawrence Stewart <stewart(a)serissa.com> wrote:
> I'll chime in just to say that designing with ECL was one hell of a lot of
> fun compared to TTL.
>
> The first Alpha chip (EV3) had pad drivers that could be configured for TTL
> levels or for ECL levels. In fact, a good chunk of the ISSCC paper is about
> the pad driver.
>
> I was part of the team that built the first Alpha machine, the Alpha
> Demonstration Unit, see
> ftp://ftp.linux-mips.org/pub/linux/mips/people/macro/DEC/DTJ/DTJ803/DTJ803P…
>
> For a limited number of machines, with power no object we were able to make
> an unabashed ECL design using the ECL 100K logic family, the ECLinPS family
> (300 ps gate delays) and some custom Gigabit Logic Gallium Arsenide parts
> for the memory board address line drivers.
>
> We got power supply cables from a local valley welding shop and had them cut
> to length. The shop owner wanted to know “what kind of a welder needs 18”
> cables?” The issue was the 400 Amps of -4.5 v. Each jelly bean chip was
> between 1/2 and 1 watt IIRC.
>
> The beauty of ECL is that it is perfectly happy to drive 50 ohm transmission
> lines, with shunt termination. This gives you incident wave switching and
> really beautiful signal integrity. I think if Cray had tried to build the
> Cray 1 with anything other than ECL it just would never have worked
> reliably, especially with such long wires needed.
>
> Essentially, ECL let you build big machines with the same reliability that
> could only be achieved with small machines using TTL. Great stuff if you
> can afford the power consumption.
>
> In the same way that it is worthwhile to own a sports car at least once in
> your life, it was a joy to build an ECL design.
>
> -Larry
>
>
> On 2017, Dec 29, at 6:54 PM, Kevin Bowling <kevin.bowling(a)kev009.com> wrote:
>
> I trust your judgement and experience WRT the Alpha.
>
> If you're looking for massive performance deltas, what about ECL
> designs like the IBM 3090 and Cray designs in the late '80s/ early
> '90s? I believe those were not a multiple but a magnitude faster than
> contemporaries.
>
> Regards,
>
>
8:35 a.m.
New subject: Why did PDPs become so popular?
On 12/29/17, Lawrence Stewart <stewart(a)serissa.com> wrote:
The EV3 was an early Alpha chip, in, I think, .9 micron CMOS, that did not
have an FPU, so the floating point was emulated. The first products were
200 MHz EV4 machines that were in .75 micron CMOS.
Yes. EV3 was a prototype, really, released as a development
breadboard platform for early adopters and ISVs. EV4 was the first
production Alpha.
-Paul W.
8:20 a.m.
New subject: Why did PDPs become so popular?
On 12/29/17, Kevin Bowling <kevin.bowling(a)kev009.com> wrote:
Enlightening to read
about how the coherence protocol was developed in software. How was
the ISA, and I assume even implementation detail, kept equal or close
enough to the eventual microprocessor parts? Does the "Privileged
Architecture Library" mean it was effectively microcoded?
Yes, IMO the Alpha PALcode was a form of microcode. DEC designed the
Alpha ISA with the hardware folks working closely with the VMS and DEC
UNIX (soon to become Tru64 UNIX) OS groups to insure that the correct
balance of PALcode vs. implemented-in-hardware was struck.
-Paul W.
31 Dec
31 Dec
8:47 a.m.
New subject: Why did PDPs become so popular?
On 29 December 2017 at 19:54, Lawrence Stewart <stewart(a)serissa.com> wrote:
I was part of the team that built the first Alpha machine, the Alpha
Demonstration Unit, see
ftp://ftp.linux-mips.org/pub/linux/mips/people/macro/DEC/
DTJ/DTJ803/DTJ803PF.PDF
I couldn't access this on my phone - no FTP client - so I blindly assumed
that it was DEC Technical Journal Vol. 8 no. 3. That turned out to be
completely untrue, but in a perhaps amusing way - one of the articles was
Bob Supnik discussing the reasoning behind the original development of
SIM(H), intended to preserve computing history.
As far as the article you posted - from Vol. 4 no. 3 - the idea that 35
prototypes were created in ECL and running as a multiprocessor system,
taking over 4kW not including the front end, is absolutely remarkable to
me. Does any of that original code for the front end still exist?
-Henry
30 Dec
30 Dec
7:07 a.m.
New subject: Why did PDPs become so popular?
In my second career after UNIX, I spent a lot of time writing high performance image
processing software that ran on just about every platform out there: Sun3 , Spark, the
DEC SPIM, ALPHA, the iTanium (or as we called it the iTanic), HP PA/RISC, Apollo DN10000,
SGI from the O2 and the Indy all the way up to the reality engines, Stellar, Ardent, IBM
RS6000, Masspar, weird IBM things like the W4 card in the PS/2, i860 OKI workstatiosn,
Intergraph Clippers, and probably more I'm forgetting. The Alpha was hot stuff for
about nine months. Ran OSF/1 formerly DigitalUnix formerly OSF/1.
I remember one day Stardant called and said they needed the G1000 they loaned us right
back. I boxed it up (it was a tradeshow machine and came in a road case). I set it on
the loading dock. The next day Stardent announced they were going out of business. A
year later I was out on the loading dock and "hey, is this stupid thing still
here." A few minutes later I get a call from our sales guy. He's got a call
from a guy looking for a copy of Motif for the Stellar G1000. I laugh. He says "I
know, they're out of business." I said, "Yes, but today's your lucky
day. I still have one." I powed it up, pulled off the Motif to send the guy and
then trashed the machine. One of my coowrkers "decapitated" the WysePC the
thing had on top of it as a control/bootup processor. We had one of the CPU cards on
the wall as a "art" for a while.
8:30 a.m.
New subject: Why did PDPs become so popular?
On 12/29/17, Ron Natalie <ron(a)ronnatalie.com> wrote:
The Alpha was hot
stuff for about nine months. Ran OSF/1 formerly DigitalUnix formerly
OSF/1.
Digital UNIX for the VAX was indeed derived from OSF/1. The port to
Alpha was called Tru64 UNIX.
Tru64 UNIX was initially a pure 64-bit system, with no provision for
building or running 32-bit program images. This turned out to be a
mistake . DEC found out that a lot of ISVs had code that implicitly
"knew" that sizeof() a pointer was the same as sizeof(int) was the
same as 4 bytes. Tru64 was forced to implement a 32-bit compatibility
mode.
There was also a problem with the C compiler initially developed at
DECwest in Seattle. It supported ONLY ANSI standard C and issued
fatal errors for violations/extensions of the standard. We (DEC
mainstream compiler group) called it the Rush Limbaugh
compiler--extremely conservative, and you can't argue with it.
-Paul W.
31 Dec
31 Dec
9 a.m.
New subject: Why did PDPs become so popular?
On 29 December 2017 at 21:30, Paul Winalski <paul.winalski(a)gmail.com> wrote:
On 12/29/17, Ron Natalie <ron(a)ronnatalie.com>
wrote:
I'm curious about this. As far as I know the development of the released
OS for the Alpha went this way:
(OSF/1 reference) -> (OSF/1 for MIPS) -> OSF/1 V[1.2, 2, 3.0] -> Digital
UNIX [3.2, 4] -> Tru64[5]. Was there ever a branch of this for the VAX?
And was the frontend for the compiler for the Alpha not the same as for the
DECstations? That had the -std options to switch between K&R,
"compatibility," and pure ANSI. My DECstation isn't up right now but I
believe its compiler under OSF/1 could even take the Sun compiler options,
-Xc, -Xa, etc.
-Henry
The Alpha was hot
stuff for about nine months. Ran OSF/1 formerly DigitalUnix formerly
OSF/1.
Digital UNIX for the VAX was indeed derived from OSF/1. The port to
Alpha was called Tru64 UNIX.
Tru64 UNIX was initially a pure 64-bit system, with no provision for
building or running 32-bit program images. This turned out to be a
mistake . DEC found out that a lot of ISVs had code that implicitly
"knew" that sizeof() a pointer was the same as sizeof(int) was the
same as 4 bytes. Tru64 was forced to implement a 32-bit compatibility
mode.
There was also a problem with the C compiler initially developed at
DECwest in Seattle. It supported ONLY ANSI standard C and issued
fatal errors for violations/extensions of the standard. We (DEC
mainstream compiler group) called it the Rush Limbaugh
compiler--extremely conservative, and you can't argue with it.
3:59 p.m.
New subject: Why did PDPs become so popular?
On 31 Dec 2017, at 04:00, Henry Bent <henry.r.bent(a)gmail.com> wrote:
I'm curious about this. As far as I know the
development of the released OS for the Alpha went this way:
(OSF/1 reference) -> (OSF/1 for MIPS) -> OSF/1 V[1.2, 2, 3.0] -> Digital UNIX
[3.2, 4] -> Tru64[5]. Was there ever a branch of this for the VAX?
Actually OSF/1 T1.0 was shipped to customers. I know because it was on the three Alphas we
received at Imperial College in the UK. It also came with an early version of MX, the
32-bit MIPS to 64-bit Alpha translator which we used to get Ghostscript working (essential
for our Mathematicians, after getting TeX to compile).
We tried to get Ghostscript ported as soon as the machines were up but failed miserably
and were (still am, actually) grateful for MX saving the day.
Arrigo
9:55 p.m.
New subject: Why did PDPs become so popular?
On 12/30/17, Henry Bent <henry.r.bent(a)gmail.com> wrote:
On 29 December 2017 at 21:30, Paul Winalski
<paul.winalski(a)gmail.com>
wrote:
I'm curious about this. As far as I know the development of the released
OS for the Alpha went this way:
(OSF/1 reference) -> (OSF/1 for MIPS) -> OSF/1 V[1.2, 2, 3.0] -> Digital
UNIX [3.2, 4] -> Tru64[5]. Was there ever a branch of this for the VAX?
No, you are correct; I was misremembering. I wasn't paying much
attention to UNIX at the time.
-Paul W.
2547
days inactive
2549
days old
13 comments
7 participants
participants (7)
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Arrigo Triulzi -
Henry Bent -
Kevin Bowling -
Larry McVoy -
Lawrence Stewart -
Paul Winalski -
Ron Natalie