On Thu, Jun 29, 2023 at 11:05 AM Will Senn <will.senn(a)gmail.com> wrote:
Clem's +1 caught my attention, so I looked into
the referenced docs. I saw the rather simple (conceptually) m6 processor described in tech
note 54. I like its understandable.
Why is it called m6? Just curious.
I'll take a stab at that; I presume it's due to the naming convention
for macro processors from Bell Labs. Consider m4, which itself was
written as, "an extension of a macro processor called M3 which was
written by D. M. Ritchie for the AP-3 minicomputer; M3 was in turn
based on a macro processor implemented for [1]." (from, "The M4 Macro
Processor" by Brian Kernighan and Dennis Ritchie, as distributed with
4.3BSD; reference [1] is to "Software Tools" by Kernighan and
Plauger).
Anyway, once you've got M3 and M4, you've got a naming convention; I'd
think it a safe bet that there was an M5 that was an internal
experiment, and that M6 was simply the next in line and was
interesting enough to be documented in a tech report.
- Dan C.
Aside: the AP-3 minicomputer came up on this list a few years ago,
when Dag Spicer of the Computer History Museum was looking for
information about it. Near as folks could figure, it was the computer
portion of a Bendix "stereoplotter" for creating terrain maps and the
like (Adam Sampson figured that part out; others derived Bendix from
part numbers taken from a US Air Force spare parts requisition
document I found).
On 6/29/23 09:40, Clem Cole wrote:
+1 👍
ᐧ
On Thu, Jun 29, 2023 at 3:37 AM Noel Hunt <noel.hunt(a)gmail.com> wrote:
Many thanks.
On Thu, 29 Jun 2023 at 17:14, <arnold(a)skeeve.com> wrote:
>
> Available at
https://www.skeeve.com/bell-labs-cstrs.tar.gz
>
> Warren and Brantley and anyone else, feel free to retrieve.
>
> I have two sets - both are in the tarball so there are undoubtedly
> duplications. If someone else can curate them into single canonical
> set that'd be helpful, I just don't have the time right now.
>
> Enjoy,
>
> Arnold