Re: [TUHS] Faster cpus at any cost

On Fri, 29 Jun 2018 09:51:55 +0100 "Steve Simon" <steve(a)quintile.net> wrote: [In the same spirit :-)] The spin orbit torque (SOT) MRAM devices seem very promising. Spin tranfer torque (STT) MRAM are both seen as persistent memories that will work beyond the feature sizes where current flash based CMOS devices won't work as they rely on retaining charge, while STT/SOT decives depend on magnetism (the spin direction is switched with a tiny bit of electrical energy). What is more, they don't have number of write limits of flash memory, nor the very long write times (STT/SOT writes are on the order of 100ps to 10ns as opposed to 1us to 1ms for flhas and takes million times less energy to write). STT-MRAMs are already being used in small sizes (given no write limits & high speed, it makes a good cache layer for SSDs). But STT devices have a number of limits that SOT don't have. SOTs can be written about 10 times faster and they can be used at even smaller feaure sizes. The really intersting part is logic gates have been constructed using the same technologu. Unlike tradition charge based devices where CPU and massive memory are kept separate, here logic and memory can be on the same chip. In fact the same device can perform logic and retain the results and the logic can be electrically reconfigured. These gates can be an order of magnitude smaller (compared to 14nm FinFET CMOS) and are ultra energy efficient => much less heat. And massive parallelism. Too early to tell whether this actually pans out or scales up to billions of gates. And of course, if we are to believe the crowd here, this will be an utter failure since it won't really help us C programs faster :-) Also, I just read this stuff; I have no insight and I may have misconstrued everything! A reference that may be of interest: https://www.nature.com/articles/s41598-017-14783-1.pdf Optics will more likely be used for a communication layer.