20 Mar
2003
20 Mar
'03
12:34 a.m.
On Wed, 19 Mar 2003, Steven M. Schultz wrote:
The buffer cache must be entirely mapped by UMRs - so
if you have a
32KB buffer the kernel will reserve 4 UMRs on a UNIBUS system.
Realistically a 64KB buffer cache is about the maximum a UNIBUS system
can have because that takes 8 of the UMRs.
Are the UMRs allocated and set up statically?
(I haven't looked inside 2BSD for a while now, and can't remember much of
the internals anymore.)
With the old (thankfully no longer in use, etc) 3Com
ethernet boards
you had to disable 4 UMRs so the system could access the memory in the
card - that made for a very tight fit.
How many UMRs does the system use? 8 for buffer cache, you might expect
one or two DH11s, that would require a few more, ethernet takes another
few, but it seems there shouldn't be such a shortage.
What did I miss?
Johnny
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: bqt(a)update.uu.se || Reading murder books
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