10 Jul
2024
10 Jul
'24
11:26 p.m.
It appears that Noel Chiappa <jnc(a)mercury.lcs.mit.edu> said:
Knuth was talking about simulating one machine on another, interpreting
one instruction at a time. As he notes, the performance is generally awful,
although IBM did microcode emulation of many of their second generation
machines on S/360 which all (for business reasons) ran faster than the
real machines. Unsurprisingly, you couldn't emulate a 7094 on anything
smaller than a 360/65.
We've been discussing batch or JIT translation of code which gives
much better performance without a lot of hardware help.
From: Dan
Cross
> These techniques are rather old, and I think go back much further than
> we're suggesting. Knuth mentions nested translations in TAOCP ..
> suggesting the technique was well-known as early as the mid-1960s. In a batch OS which only runs in a single mode, one
_could_ just use regular
subroutine calls to call the 'operating system', to 'get there from
here'.
The low-level reason not to do this is that one would need the addresses of
all the routines in the OS (which could change over time).
That was quite common. The manuals for 70xx IOCS, which was the I/O
management part of the system, show all the IOCS calls use TSX, the
usual subroutine call which saved the return address in an index
register and jumps (Transfers.) I think they avoided the address
problem by putting transfer vectors at fixed locations in low memory,
so your code did the TSX to an entry in the transfer vector which
jumped to the real routine.
one. I happen to have a CTSS manual (two, actually :-),
and in CTSS a system
call was:
TSX NAMEI, 4
..
..
NAMEI: TIA =HNAME
where 'NAME' "is the BCD name of a legitimate supervisor entry point",
and
the 'TIA' instruction may be "usefully (but inexactly) read as Trap Into A
core" (remember that in CTSS, the OS lived in the A core). (Don't ask me what
HNAME is, or what a TSX instruction does! :-)
TSX we know, but I don't see TIA in the regular 7094 manual. It's
documented in the RPQ for additional core storage, a jump from core
bank B to A. The multiprogramming RPQ made TIA trap in protection mode,
so it was indeed a system call.