30 Dec
2017
30 Dec
'17
7:47 a.m.
That is awesome, thanks for the story and link. Enlightening to read
about how the coherence protocol was developed in software. How was
the ISA, and I assume even implementation detail, kept equal or close
enough to the eventual microprocessor parts? Does the "Privileged
Architecture Library" mean it was effectively microcoded? What kind
of software structure was used to provide the I/O channel on the
DECStations, for instance did it map the other TURBOChannel devices
into the demo's address space so it ran the stock device drivers, or
was the I/O server software intermediating a mailbox for doing SCSI,
Ethernet etc with a different device model?
Reminds me of a book I really liked "The Supermen: The Story of
Seymour Cray and the Technical Wizards Behind the Supercomputer",
especially Seymour Cray's willingness to throw out convention and
redefine the game. Corollary to Larry's point about CPU designers
losing by only competing against their own last design.. you can
either make new markets or lead in the ongoing one, not a lot of air
outside that.
Regards,
On Fri, Dec 29, 2017 at 5:54 PM, Lawrence Stewart <stewart(a)serissa.com> wrote:
I'll chime in just to say that designing with ECL
was one hell of a lot of
fun compared to TTL.
The first Alpha chip (EV3) had pad drivers that could be configured for TTL
levels or for ECL levels. In fact, a good chunk of the ISSCC paper is about
the pad driver.
I was part of the team that built the first Alpha machine, the Alpha
Demonstration Unit, see
ftp://ftp.linux-mips.org/pub/linux/mips/people/macro/DEC/DTJ/DTJ803/DTJ803P…
For a limited number of machines, with power no object we were able to make
an unabashed ECL design using the ECL 100K logic family, the ECLinPS family
(300 ps gate delays) and some custom Gigabit Logic Gallium Arsenide parts
for the memory board address line drivers.
We got power supply cables from a local valley welding shop and had them cut
to length. The shop owner wanted to know “what kind of a welder needs 18”
cables?” The issue was the 400 Amps of -4.5 v. Each jelly bean chip was
between 1/2 and 1 watt IIRC.
The beauty of ECL is that it is perfectly happy to drive 50 ohm transmission
lines, with shunt termination. This gives you incident wave switching and
really beautiful signal integrity. I think if Cray had tried to build the
Cray 1 with anything other than ECL it just would never have worked
reliably, especially with such long wires needed.
Essentially, ECL let you build big machines with the same reliability that
could only be achieved with small machines using TTL. Great stuff if you
can afford the power consumption.
In the same way that it is worthwhile to own a sports car at least once in
your life, it was a joy to build an ECL design.
-Larry
On 2017, Dec 29, at 6:54 PM, Kevin Bowling <kevin.bowling(a)kev009.com> wrote:
I trust your judgement and experience WRT the Alpha.
If you're looking for massive performance deltas, what about ECL
designs like the IBM 3090 and Cray designs in the late '80s/ early
'90s? I believe those were not a multiple but a magnitude faster than
contemporaries.
Regards,