Closest I've ever been murdered was when I
"accidentally" filled the local
11/70 with an uninterruptible instruction sequence."
SPL instruction. The PDP-11 was odd that while SPL was a "privileged"
instruction, rather that trapping if you did it in user mode, it just
"ignored" it.
Well, what it ignored was the actual change of the processor level. What
it still implemented was the side effect was that interrupts were locked out
until the next instruction fetch.
If you filled your instruction space up with SPLs you could lock up the
computer so that even the HALT key didn't work (you had to do a bus RESET).
In an attempt to do this in user mode in our hybrid-V6 system I tripped
across another bug. I did it during the day when there was a high load on
the system and my process got swapped out.
When it got swapped in, it rounded up the BRK to the next higher 64 bit
chunk. Of course this rolled around to zero. It allocated zero bytes of
memory getting zero and then did a DMA from our swap device to it.
That was a bit more flamboyant.
Fortunately , my mentor Mike Muuss tolerated these fiascos as long as I went
and fixed the bug I had just exploited afterwards.