24 Sep
2018
24 Sep
'18
5:25 p.m.
Paul Winalski <paul.winalski(a)gmail.com> wrote:
In general, a CISC instruction set encoding can express the same
algorithm more compactly than a RISC instruction set. Once CISC
technology solved the instruction pipelining and decoding problem, it
gained an advantage over RISC architectures such as Alpha because the
instruction set stream was less verbose.
It's more subtle than that, I think. One of the best contributions to this
discussion was John Mashey's classic comp.arch article (which I originally
read in 1994, I think) -
https://yarchive.net/comp/risc_definition.html
What is striking about it is that the two dominant architectures now are
(very roughly) the least CISCy CISC and the least RISCy RISC. In
particular x86 did not go in for elaborate addressing modes and highly
orthogonal instruction sets that allow you to use the elaborate addressing
modes multiple times in one instruction. (Compare it with later 68Ks, for
contrast.) So the translation to RISC-style micro-ops does not end up with
ridiculously long dependency chains within most instructions.
Tony.
--
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