19 Mar
2024
19 Mar
'24
4:39 a.m.
On Mar 18, 2024, at 1:21 PM, segaloco via TUHS <tuhs(a)tuhs.org> wrote:
only caveat being the transmitter status register was a dirty filthy liar and
wouldn't flip the bit on transmit, so just had to put a delay, which it turns out all
of the BSDs currently also do for Ti 16550-family UARTs as well.
NatSemi (later Ti) 16550s have a 16 byte fifo in each direction.
Any delays would be in getc(), putc(), used for system console io,
not general serial io. Ignoring any code for brokenness! The early
16660 versions had a bug preventing use of the fifo but this was
fixed ages ago. At least this is what I remember decades later!