On Tue, Jan 21, 2020 at 01:28:14PM -0500, Clem Cole wrote:
The Onyx box redated all the 68K and later Intel or
other systems.
That was a fun bit of grubbing around courtesy of a bitsavers mirror
(
https://www.mirrorservice.org/sites/www.bitsavers.org/pdf/onyx/)
It seems they started with a board based upon the non-segmented Z8002
and only later switched to using the segmented Z8001. In the initial
board, they created their own MMU:
Page 6 of:
https://www.mirrorservice.org/sites/www.bitsavers.org/pdf/onyx/c8002/Onyx_C…
Memory Management Controller:
The Memory Management Controller (MMC) enables the C8002 to perform
address translation, memory block protection, and separation of
instruction and data spaces. Sixteen independent map sets are
implemented, with each map set consisting of an instruction map and
a data map. Within each map there are 32 page registers. Each page
register relocates and validates a 2K byte page. The MMC generates
a 20 bit address allowing the C8002 to access up to one Mbyte of
physical memory.
So I'd guess the MMC was actually programed through I/O instuctions
to io space, and hence preserved the necessary protection domains.
Cute. I've had a background interest in the Z8000 (triggered by reading
a Z80000 datasheet around 87/88), and always though about using
the segmented rather than unsegmented device.
The following has a bit more info about the version of System III
ported to their boxes:
https://www.mirrorservice.org/sites/www.bitsavers.org/pdf/onyx/c8002/UNIX_3…
DF