24 Mar
2016
24 Mar
'16
6:43 a.m.
On Mar 23, 2016, at 7:32 PM, Ron Natalie
<ron(a)ronnatalie.com> wrote:
This is of course a fairly well known bug in the pdp11. I wonder if this was fixable with
a hardware mod, like the “there’s this NAND gate here” sort of fix to the MTPx/MFPx
instructions or if it required a change to the microcode, that presumably DEC wasn’t
interested in.
Closest I've ever been murdered was when I
"accidentally" filled the local
11/70 with an uninterruptible instruction sequence."
SPL instruction. The PDP-11 was odd that while SPL was a "privileged"
instruction, rather that trapping if you did it in user mode, it just
"ignored" it.
Well, what it ignored was the actual change of the processor level. What
it still implemented was the side effect was that interrupts were locked out
until the next instruction fetch.
If you filled your instruction space up with SPLs you could lock up the
computer so that even the HALT key didn't work (you had to do a bus RESET). [snip]