On Fri, Nov 27, 2020 at 6:55 AM Noel Chiappa <jnc(a)mercury.lcs.mit.edu>
wrote:
The thing that takes special hardware is _protecting_
one task from a bug
in
another - a bug which could trash the first tasks's (or the system's!)
memory. One has to have memory management of some kind to do that.
Actually, a modified version of the * approach will also work. When
switching processes, swap the whole process out to your fastest device (on
* this was a single write to the drum) and swap in the new process. *
hardware had a bounds register, so it was only necessary to swap out enough
of the previous process to fit the smaller process in. So after a while,
core started to look like an onion, with the current process at the bottom
and pieces of larger non-current processes above that.
(I thought that * was MIT CTSS, but I can't confirm that.)
As for interrupts, the stock 2e has both IRQ and NMI lines. Erann Gat aka
Ron Garret explains in <
https://www.atarimagazines.com/compute/issue9/030_1_THE_25C_APPLE_II_REAL_T…
how to make an external clock and hook it to the NMI pin for 25 cents in
1981 dollars (about $1.67 today; h/t
measuringworth.com)
John Cowan
http://vrici.lojban.org/~cowan cowan(a)ccil.org
A mosquito cried out in his pain,
"A chemist has poisoned my brain!"
The cause of his sorrow / Was para-dichloro-
Diphenyltrichloroethane. (aka DDT)