On 11/28/22, Clem Cole <clemc(a)ccc.com> wrote:
A few years later (1980), Goble's work became the Purdue Vax [
https://en.wikipedia.org/wiki/George_H._Goble] - which used a master-slave
configuration. He spliced a second 780 CPU onto the SMB
SBI (Synchronous Backplane Interconnect), the data bus for the 11/780.
The KA780 CPU plugged into it, as did the memory controller, the UBA
(UNIBUS adapter), the MBA (MASSBUS adapter), and the CI (Computer
Interconnect, the high-speed network used for VAXcluster
communication).
and, with some
interesting work, allowed the second CPU to run user code. This was
extremely effective for their usage case -- timesharing of students.
Normally only one KA780 CPU was attached to the SBI, but there was
nothing physical or electronic to prevent plugging in a second one.
IIRC there were a couple of places in the 11/780 microcode that
assumed there was only one CPU on the SBI, but that was easily
tweaked. DEC productized the two-processor asymmetric multiprocessor
configuration as the VAX-11/782. The software development tools group
that I worked in was one of the two beta test sites for the 782 (the
other was MIT). I was the system manager for that machine. Ours ran
VMS, of course, not Unix, but with the same idea that only user mode
code was scheduled to run on the second processor. All I/O and kernel
mode code was done on the primary. It scaled pretty well for
compute-intensive loads. It actually ran slower than a single
processor under high I/O loads, though, and it gave no advantage to
real-time workloads.
I don't know if Ultrix ever supported the 11/782. The product had a
rather short lifetime, as it was soon superseded by VAX models that
were designed for symmetric multiprocessing from the ground up, and
full SMP support had been implemented in VMS and Ultrix.
-Paul W.