I’m still researching John Reiser’s 32V with demand paging, copy-on-write and mmap.
Unfortunately, JFR does not have the bits or a listing for this version of 32V.
I’ve read the MSc theses of Leffler and Shannon with interest
(
https://www.tuhs.org/Archive/Documentation/Theses/) The thesis of Shannon has an
interesting discussion of a demand paged version of his Harris/6 Unix (Chapter 5). It is
based on the Tenex ideas, just as JFR mentioned for his version. The thesis of Leffler
contains a gant chart that shows that the demand paged version was written in the first
months of 1980 -- concurrently with or slightly after the 32V version.
I’ve also (superficially) read the papers on Tenex memory management. The design is
closely tied to PDP-10 MMU that BBN designed for Tenex. Some of its data structuring is
recognisable in Shannon’s version. One defining aspect is that the design for both is for
a virtual address space that is smaller than the physical address space; on a 1980 VAX it
was the reverse.
If 32V followed the same design ideas (a big if), it most likely limited processes to a
capped address space (e.g. 2MB). It might also have contained an in-core flag/data vector
with as many entries as there are pages frames in swap space. If true, these downsides may
have been why it did not go on to become the root for SysVR1 or R2 paging.
The demand paging code for SysVR2 was written by Keith A. Kelleman and Steven J. Buroff,
and in contemporary conference talks they were saying that they wanted to combine the best
parts of demand-paged 32V and BSD. They may have some additional memories that could help
with getting a better understanding of the final version of 32V.
Does anybody have contact details for these two gentlemen?