24 Sep
2018
24 Sep
'18
3:17 a.m.
On 9/23/18, A. P. Garcia <a.phillip.garcia(a)gmail.com> wrote:
In trying to steer this word salad towards some semblance of meaningful
discussion, is SPARC dead? Practically, yes, I would say so. Or at least it
seems to be heading in that direction. Is RISC dead? Not at all. ARM is
doing quite well, and the old "CISC vs RISC" thing seems to be a non-issue
now, as even the current x86 processors have adopted many design features
that originated in RISC research.
In general, a CISC instruction set encoding can express the same
algorithm more compactly than a RISC instruction set. Once CISC
technology solved the instruction pipelining and decoding problem, it
gained an advantage over RISC architectures such as Alpha because the
instruction set stream was less verbose. Modern x86 designs have a
bit of logic stuck in one corner that translates the x86 instruction
stream into a string of RISC-style micro-operations. The cores
execute the micro-ops. Micro-op sequences can be cached, so the
translation is done only once for loops. The result is, as it were,
the best of both worlds--the compactness of a CISC instruction stream
and the simpler and faster circuitry of RISC.
-Paul W.