On 6/21/18, Arrigo Triulzi <arrigo(a)alchemistowl.org> wrote:
On 21 Jun 2018, at 16:00, Paul Winalski
<paul.winalski(a)gmail.com> wrote:
[...]
for the microcode to customers. There were
several hacks in there to
slow down the disk I/O so that it didn't outperform the model 30.
Is this the origin of the lore on “the IBM slowdown device”?
I seem to recall there was also some trickery at the CPU level so that you
could “field upgrade” between two models by removing it but a) I cannot find
the source and b) my Pugh book is far and cannot scan through it.
I don't know about that for IBM systems, but DEC pulled that trick
with the VAX 8500 series. Venus, the successor to the 11/780, was
originally to be called the 11/790 and was done in ECL by the PDP-10
folks. The project suffered many delays and badly missed its initial
market window. It eventually was released as the VAX 8600. It had a
rather short market life because by that time the next generation CPU,
codenamed Nautilus and implemented in TTL, was nearly ready for market
and offered comparable performance. There was also a slower and lower
cost system in that series codenamed Skipjack. When it finally came
time to market these machines, it was found that the product line
needed a reduced cost version of Skipjack. Rather than design a new
CPU, they just put NOPs in the Skipjack microcode to slow it down.
The official code name for this machine was Flounder, but within DEC
engineering we called it "Wimpjack". Customers could buy a field
upgrade for Flounder microcode that restored it to Skipjack
performance levels.
-Paul W.