25 Sep
2018
25 Sep
'18
1:46 a.m.
On 2018-Sep-23 17:17:35 -0400, Paul Winalski <paul.winalski(a)gmail.com> wrote:
In general, a CISC instruction set encoding can express
the same
algorithm more compactly than a RISC instruction set. Once CISC
technology solved the instruction pipelining and decoding problem, it
gained an advantage over RISC architectures such as Alpha because the
instruction set stream was less verbose.
RISC architectures have another advantage that instructions are always
aligned on known boundaries (typically 2 or 4 bytes). This simplifies
the logic around (pre-)fetching instructions.
Modern x86 designs have a
bit of logic stuck in one corner that translates the x86 instruction
stream into a string of RISC-style micro-operations.
Where "modern" is "this century".
...
the best of both worlds--the compactness of a CISC
instruction stream
and the simpler and faster circuitry of RISC.
In the specific case of x86, I would dispute that. The various warts in the
x86 instruction set and "architecture" mean that x86 code density is
relatively low and on a par with SPARC code. I agree that the overall
performance is impressive but that is more a measure of the abilities of
Intel's engineers than the overall approach.
--
Peter Jeremy