And I think even V7 make supported what you described,
as well as implicit rules for compiling .c into a .o or into a binary.
Warner Losh
You're right, I just tried it out. Been avoiding that pattern for years because I
swear some make implementation I used at one point was very unhappy with that, but if V7
does it, then whatever implementation that was is probably not what I want to be using
anyway.
Also shows how little I've used specifics of BSD, I've never made a Makefile
using bsd.prog.mk, although I have this desire for a write-once-build-everywhere Makefile
that the preponderance of build systems that generate them imply is an exercise in
futility...
On that note, one quirk I've found with the implicit .c.o rule on older UNIX, just
tested on V7 and System III, is that they render:
cc -c $<
rather than
cc -c -o $@ $<
If you have an object list with objects in several different directories, it spits them
all out in the CWD, causing problems if you have similarly named files in multiple
directories, and then outright failing on the final compilation if it's something
like $(CC) -o $(BIN) $(OBJS) because $(OBJS) is a string of object pathnames with the full
nested path, not just the resulting *.o files.
Granted, I could be anti-patterning here for all I know, I haven't worked closely
with a whole lot of Make-based projects that aren't my own. Maybe I just
haven't read these darn papers I'm always hunting down enough.
- Matt G.