Dave Horsfall:
Jon von Neumann was born in 1903; without him, we probably wouldn't have
had computers at all (but we could've had a Wintel version, I suppose,
wherein everything is controlled by BB).
====
On this day in Australia, but not yet in North America or Europe.
Or, as Warren would probably prefer, it was 2015 in England, but still only
1903 in Australia. Such was the great difference in time twixt these two
great nations.
Australia, Australia, we love you from the heart,
the liver, the kidneys, and the giblets,
and every other part!
Norman Wilson
Toronto ON
All,
I'm trying to understand the RK bootloader code that is found in
"Setting up Unix - Sixth Edition". My question is related to RKBA, RK's
bus address buffer. Is the bus address the same as memory address? If
so, the code makes sense, if not, I appreciate y'alls help.
Here's what I have so far:
RK05
01 012700 MOV 177414,R0 ; Move RKDB into R0
02 177414 ; RKDB Address
03 005040 CLR -(R0) ; Decrement R0 and clear the contents of RKDA
04 005040 CLR -(R0) ; Decrement R0 and clear the contents of RKBA
05 010040 MOV R0,-(R0) ; Move the contents of R0(RKBA) into
decremented R0(RKWC)
06 012740 MOV 5,-(R0) ; Decrement R0 and move 5 into RKCS
07 000005 ; Read and go
08 105710 WAIT: TSTB (R0) ; Test the lower byte of RKCS
09 002376 BGE WAIT ; When bit 7 becomes 1, the read is done
10 005007 CLR PC ; Set PC 000000, the start of the bytes read
RKDB - RK data buffer register
This register is a general data register and it only used by the code
above to initialize R0 so that subsequent RK addresses can be found by
simply decrementing R0.
RKDA - RK disk address register
This register determines the starting disk address of the read operation
and is cleared by the code.
RKBA - RK current bus address register
This register contains the bus address to or from which data will be
transferred. Is this the same as memory address?
RKWC - RK word count register
Two's complement of the number of words to be transferred.
RKCS - RK control status register
This is the register that controls the device and provides the device
status to the program
Lines 1-2
The execution of the boot loader code moves the address of RKDB into R0
to initialize the register so that it can be used to obtain the other RK
buffer addresses as they are needed.
Line 3
The RKDA buffer is cleared, setting the disk address to 0.
Line 4
The RKBA buffer is cleared, setting the bus address to 0.
Line 5
The value in R0 is transferred into the RKWC buffer. RKBA or 177410, the
value in R0, is a convenient number to use for the read operation
because it is big enough to cause the program to read in a block of
data. The number is in two's complement and represents -370. This tells
the disk controller that 370 words (540 bytes) will be transferred.
Lines 6-7
The value 5 is placed into RKCS, this value represents a read operation
and go.
Lines 8-9
The lower byte of RKCS is tested and when it is greater than or equal to
zero (not negative), it loops, waiting until the value is negative, that
is until bit 7 becomes 1, which indicates Control Ready (RDY) and done.
Line 10
PC is set to 00000 and execution of the bytes read from the disk
begins at location 00000.
> From: John Cowan
> Rather than starting another process, the Multics shell mapped the
> executable program the user requested into its own space .. then jumped
> into it. The equivalent of exit() simply jumped back to the shell code.
This is from memory, so apply the proverbial grain, but ISTR that the
original concept for the Multics shell was just like that for Unix - i.e.
each command would be a separte child process. This was given up when Multics
processes turned out to be so computationally expensive, and they went to
commands being subroutines that were dynamically linked in (very easy with
Multics, where dynamic linking was a fundamental system capability) and
called from the shell.
Noel
So what is the etymology of "shell", then? I see that Multics has a shell. Was the CTSS user interface also called a shell?
Cheers, Warren
--
Sent from my Android phone with K-9 Mail. Please excuse my brevity.
John Cowan:
Wikipedia is by nature a *summary of the published literature*. If you
want to get some folklore, like what "cron" stands for, into Wikipedia,
then publish a folklore article in a journal, book, or similar reputable
publication. Random uncontrolled mailing lists simply do not count.
======
That sounds fair enough on the surface.
But if you follow the references cited to support the cron
acronyms, you find that random unsupported assertions in
conference papers do count. That's not a lot better.
I'd like to see a published, citable reference for the
true origin of `cron'. Even better, better published
material for a lot of the charming minutiae of the early
days of UNIX. (Anyone feel up to interviewing Doug and
Ken and Brian and whoever else is left, and writing it up
for publication in ;login:?)
But I'd be satisfied if we could somehow stamp out the
use of spurious references to support spurious claims.
If I had the time and energy I'd look into how to challenge
the cron acronyms on those grounds. Any volunteers?
Norman Wilson
Toronto ON
> From: Will Senn
> 000777 HALT
That's actually "BR ."; the difference is important, since the CPU (IIRC)
doesn't honour DMA requests when it is halted, and DMA needs to be working for
the controller to read that first block (a secondary tape bootstrap) into
memory.
> This seems like gobbledegook to me.
:-)
> It moves the MTCMA (Magtape Current Memory Address) into R0, then it
> moves the MTCMA into the MTBRC (Magtape Byte Record Count)
"The address of the MTCMA into", etc. Looking quickly at the programming spec
for the TM11 controllers, it wants a negative of the byte count to transfer in
this register; the address of the MTCMA just happens to also be a large enough
negative number to be usable as the (negative) size of the transfer request.
(The first record is probably shorter than that, but that doesn't matter.)
Note that this code could probably also have been written:
MOV #172524, R0
MOV R0,@R0
and been equally functional.
> then it moves 60003 into the MTC (Magtape control register), which
> causes a read operation with 800BPI 9 Channel density.
I'm too lazy to look at the programming spec for the details, but that sounds
right.
> Am I misinterpreting the byte codes or is this some idiosyncratic way to
> get the Magnetic tape to rewind or something (the TM11 has a control
> function to rewind, so it seems unlikely that this is the case
No, it's just the shortest possible program to read the first block off the
tape.
It depends on i) the operator having manually set the tape to the right point
(the start of the tape), so that it's the first block that gets read, and ii)
the fact that the reset performed by hitting the 'Start' key on the CPU clears
the TM11 registers, including the Current Memory Address register, so the
block that's read is read into memory location zero.
Hence the direction to 'once the tape has stopped moving, re-start the CPU at
0'.
Noel