TUHS

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6475 discussions

by Doug McIlroy

It has often been told how the Bell Labs law department became the first non-research department to use Unix, displacing a newly acquired stand-alone word-processing system that fell short of the department's hopes because it couldn't number the lines on patent applications, as USPTO required. When Joe Ossanna heard of this, he told them about roff and promised to give it line-numbering capability the next day. They tried it and were hooked. Patent secretaries became remote members of the fellowship of the Unix lab. In due time the law department got its own machine. Less well known is how Unix made it into the head office of AT&T. It seems that the CEO, Charlie Brown, did not like to be seen wearing glasses when he read speeches. Somehow his PR assistant learned of the CAT phototypesetter in the Unix lab and asked whether it might be possible to use it to produce scripts in large type. Of course it was. As connections to the top never hurt, the CEO's office was welcomed as another ouside user. The cost--occasionally having to develop film for the final copy of a speech--was not onerous. Having teethed on speeches, the head office realized that Unix could also be useful for things that didn't need phototypesetting. Other documents began to accumulate in their directory. By the time we became aware of it, the hoard came to include minutes of AT&T board meetings. It didn't seem like a very good idea for us to be keeping records from the inner sanctum of the corporation on a computer where most everybody had super-user privileges. A call to the PR guy convinced him of the wisdom of keeping such things on their own premises. And so the CEO's office bought a Unix system. Just as one hears of cars chosen for their cupholders, so were these users converted to Unix for trivial reasons: line numbers and vanity. Doug

8 years, 4 months

Dennis' Draft of the Unix Timesharing System: not so draft?

by Warren Toomey

All, I'm writing a paper based on my June 2016 talk on PDP-7 Unix. As part of that I was looking at the BCPL -> B -> NB -> C history. And as part of that, I was reading Ken's B manual, written in 1972: https://www.bell-labs.com/usr/dmr/www/kbman.pdf Then I noticed at the end Ken refers to: Ritchie, D.M. The UNIX Time Sharing System. MM 71-1273-4. which makes me think that the draft version Doug McIlroy found (now at http://www.tuhs.org/Archive/PDP-11/Distributions/research/McIlroy_v0/UnixEd…) must have made it into a full memorandum. Given that we have the memorandum number, does anybody know if it would be possible to find it in the archives from what was Bell Labs? Cheers, Warren

8 years, 4 months

Happy birthday, J.F.Ossanna!

by Dave Horsfall

J.F.Ossanna was given unto us in 1928; a prolific programmer, he not only had a hand in developing Unix but also gave us the ROFF series. PS: Ada Lovelace, arguably the world's first computer programmer, was given unto us in 1815; she saw the potential in Charles Babbage's new-fangled thing. -- Dave Horsfall DTM (VK2KFU) "Those who don't understand security will suffer."

8 years, 4 months

Re: [TUHS] Moto and MMU issues -- was Unix & Memory Management Units (MMU)

by Clem Cole

On Thu, Dec 8, 2016 at 5:39 AM, Joerg Schilling <schily(a)schily.net> wrote: > Back to the Bourne Shell: > > The original Bourne Shell did not use malloc, but rather had a SIGSEGV > handler > that used to extend the "string stack" called "stak" via sbrk() whenever > the > code tried to access data beyond the end ot the heap. > Right although the 68K was not the first or the only system to have that problem - again IIRC Series/1 and maybe one of the PE systems. You are correct then SunOS and >>some<< of the 68000 based system did have the problem you suggested. And in fact, Masscomp (and Apollo) which used 68000's (but used two of them so could run full VM) could survive that style of fault (because it never occurred). BTW: the "conceptual problem" , you mentioned while true, is being a little harsh. As the one of the 68K designers (Les Crudele) said to me once, when they wrote the microcode, there were not thinking about instruction restart - so the issue was that Nick did not save enough state to do it. The model for the 68000 that they were using was the base/limit PDP-11 and the original PDP-10. Also at the time, the competition was the 6800, the 8080, Z80, 6502. They were trying to put a PDP-11/70 on chip (without getting into trouble like CalData did - which Les, Nick and team were very aware having been DEC and CalData customers before they were at Moto]. While we think of the 68000 family has being 32 bit, the fact is inside it is a 16 bit system (the barrel shifter and execution functions are 16). And it was a skunk works project -- the 6809 was Moto's real processor. It was an experiment done by a couple of rogue engineers that said - hey we can do better, The fact was they made a chip that was good enough to actually compete with the Vax in the end, because it was fast enough AND they had the wisdom to define 32 bits of address space and 32 bit operations (again having been PDP-11 users), but as Les used to say - part of the thinking was that while DEC was moving to the Vax, they had hoped to break into the area that they 16 bits minis claimed - which they in-fact did. And if you think in terms of a Clay Christensen's disruption theory, the fact that VM did not work easily (i.e. was a "worse" technology than the Vax) was ok - a new breed of customer did not care. 68000 was huge success, despite Moto marketing ;-) To me the larger issue with the 68010 was that when Nick did add the restart microcode, the new '10 microcode actually dumped version dependant state on the external stack (in Intel terminology -different "step" '10 put different state on the external stack or worse, could not restart an instruction that had been saved from a different step processor). This screw up was a huge issue when we did replaced the "executor" with a 68010, because it meant that all cpu boards had to be the same processor microcode revision. Masscomp was of course the first to make an MP, so was the the first firm to run into the issue (I remember debugging it - we could not reproduce the issue because of course tjt and my own machine's by chance had "MPU" boards as we called them with the same step -- it was one of the field service guys that realized that the customer system had a mixed step board -- i.e. when they replaced a single MPU in the field, the system stopped working). IIRC: Moto never fixed the '10, as that processor was reasonably short lived in the open market. They did fix the microcode in the '20 so the state on the external stack was independent of stepping. Clem

8 years, 4 months

That's not a computer...

by Dave Horsfall

*This* is a computer! http://archive.computerhistory.org/resources/text/EAI/EAI.HYDAC2400.1963.10… A hybrid analogue/digital box, what could possibly go wrong? And check out the dudes and dudess supporting it (except she'd better be careful when moving her chair, in case she takes out a paper tape unit...). -- Dave Horsfall DTM (VK2KFU) "Those who don't understand security will suffer."

8 years, 4 months

Re: [TUHS] Unix & Memory Management Units (MMU)

by jnc＠mercury.lcs.mit.edu

> Dennis Ritchie's home pages have some info on this Yeah, I'd read that - I was hoping for some actual technical info on the KS11, though. (I'm assuming he has given the name there correctly, or if his memory has dropped a bit - a thing which human memories do! :-) - since I've never been able to find a single mention of it, including in the Spare Module Handbook, which covers other Special Systems products). > I looked for (but did not find) information on what ""the classical > PDP-10 style "hi-seg" "low-seg" memory mapping unit"" was. The best description is in the DECSystem-10 Hardware Reference Manual (mine is EK-10/20-HR-001, but alas that version appears not to be online - I'll scan my copy and put it online when I get a chance.) This version: http://pdp10.nocrew.org/docs/ad-h391a-t1.pdf does appear to cover it: pp. 5-38 through 5-40 (pp. 352-354 of the PDF) for the KA10, and pp. 5-15 to 5-30 (pp. 329-344) for the KI10. The KA10 provided one (optionally) two base/bounds register pairs, where the base register contains the location in real memory. With two pairs (the second one applied to high user address space), the high part could be write-protected, for sharing pure code. The KI10 provided something similar to this, but more complicated; it included paging, but also something called User 'Concealed', which allowed proprietary subroutine packages to be used, while hidden from the rest of the user's code. > Does anyone have an idea what PDP-10 MMU Dennis may have been referring > to? Almost certainly the KA10. > Here my hypothesis would be that in kernel mode mapping was off, and > that in user mode there were two segments, each with a base and limit > into physical memory Hard to say. Kernel mode might or might not have mapping, and User mode might have provided one, or two, segments; the KA10 did have an option for single-segment. > this setup has an echo in how the later KL-11 MMU was used. Sorry, what's a KL-11? The only 'KL11' I know of is the serial line board (M780) which was the predecessor to the DL11. Noel

8 years, 4 months

Re: [TUHS] Unix & Memory Management Units (MMU)

by Paul Ruizendaal

Finally took a look at the V1 source. Referring to http://minnie.tuhs.org/cgi-bin/utree.pl?file=V1/u2.s Toward the end of the sysexec function there is: cmp core,$405 / br .+14 is first instruction if file is / standard a.out format bne 1f / branch, if not standard format mov core+2,r5 / put 2nd word of users program in r5; number of / bytes in program text sub $14,r5 / subtract 12 cmp r5,u.count / bgt 1f / branch if r5 greater than u.count mov r5,u.count jsr r0,readi / read in rest of user's program text add core+10,u.nread / add size of user data area to u.nread br 2f 1: jsr r0,readi / read in rest of file 2: mov u.nread,u.break / set users program break to end of / user code add $core+14,u.break / plus data area jsr r0,iclose / does nothing br sysret3 / return to core image at $core $core is equated to 040000 in another file (u0.s). In V1 apparently the a.out header was 6 words (http://minnie.tuhs.org/cgi-bin/utree.pl?file=V1/man/man5/a.out.5) not 8, and hence the magic for a standard executable was 0405. It was already used as magic to distinguish a.out format files from other executables. It also shows that indeed 'exec' jumped to the first word of the header (at location $core). From this I don't think we will find code for the KS-11 in the V1 source. The file http://minnie.tuhs.org/cgi-bin/utree.pl?file=V1/u3.s also seems to support a LSX /MX like approach where each process switch equates a swap. I'd say that the lost V2 is where memory protection first appeared in Unix, i.e. 1972. Paul PS Sorry for writing 'V0' earlier -- I meant V1 all along.

8 years, 4 months

Re: [TUHS] Unix & Memory Management Units (MMU)

by Johnny Billquist

On 2016-12-08 18:18, Paul Ruizendaal <pnr(a)planet.nl> wrote: > >>> DEC's Custom Special Systems (CSS) group .. build a simple base/limi >>> register device, soon after the 11/20 was released.> ... So an early >>> version of after the original 11/20 port from the PDP-7 had this >>> however..... >> Oh, right, I'd forgotten about that: the KS-11 - I've previously enquired to >> see if anyone had _any_ documentation for this, but so far, nada. > I was looking for that a few years back. Dennis Ritchie's home pages have > some info on this (https://www.bell-labs.com/usr/dmr/www/odd.html) > At the bottom of that page he writes: > > ""Back around 1970-71, Unix on the PDP-11/20 ran on hardware that not only did not support virtual memory, but didn't support any kind of hardware memory mapping or protection, for example against writing over the kernel. This was a pain, because we were using the machine for multiple users. When anyone was working on a program, it was considered a courtesy to yell "A.OUT?" before trying it, to warn others to save whatever they were editing. > [..snip..] > We knew the PDP-11/45, which did support memory mapping and protection for the kernel and other processes, was coming, but not instantly; in anticipation, we arranged with Digital Special Systems to buy a PDP-11/20 with KS-11 add-on. This was an extra system unit bolted to the processor that made it distinguish kernel from user mode, and provided a classical PDP-10 style "hi-seg" "low-seg" memory mapping unit. I seem to recall that maybe 6 of these had been made when we ordered it."" > > My hypothesis is that the very first versions of Unix were using a memory scheme similar to that used in the later LSX and MX derivatives: the kernel resides in lower memory and the user program in upper memory; each process switch implied a swap. Disclaimer: I have not studied the V0 source to verify this hypothesis. > > When this topic had my interest I looked for (but did not find) information on what ""the classical PDP-10 style "hi-seg" "low-seg" memory mapping unit"" was. Here my hypothesis would be that in kernel mode mapping was off, and that in user mode there were two segments, each with a base and limit into physical memory -- and that this setup has an echo in how the later KL-11 MMU was used. > > Does anyone have an idea what PDP-10 MMU Dennis may have been referring to? If you read the Wikipedia page about the PDP-10, you'd find the answer. Basically, kernel mode uses physical memory. User mode have a low segment and a high segment. This is decided by the high bit of the address. For each segment, there is a base register and a length register. Commonly, the low segment stored read/write data, while the high segment could be shared between processes, and have readonly data/code. But you could play in other ways with it, if you wanted to. Essex MUD, as far as I remember, had the game data in a shared hiseg, which could be written by the program. So your guessing is pretty good. Not sure I'd say this is similar to how the later PDP-11 MMU works, though. But I can see someone making the comparison, since the PDP-11 pages can vary in size, within limits. Johnny -- Johnny Billquist || "I'm on a bus || on a psychedelic trip email: bqt(a)softjar.se || Reading murder books pdp is alive! || tryin' to stay hip" - B. Idol

8 years, 4 months

Re: [TUHS] Unix & Memory Management Units (MMU)

by jnc＠mercury.lcs.mit.edu

> From: Clem Cole > DEC's Custom Special Systems (CSS) group .. build a simple base/limi > register device, soon after the 11/20 was released.> ... So an early > version of after the original 11/20 port from the PDP-7 had this > however..... Oh, right, I'd forgotten about that: the KS-11 - I've previously enquired to see if anyone had _any_ documentation for this, but so far, nada. > I would look at Warren's First Edition work to see if there were dregs > of this in that code base Alas, I'd already had that idea (to try and at least re-create a programming spec, at least, for the KS11). There do not seem to be any traces there, perhaps because that code came from a document entitled "Preliminary Release of Unix Implementation", which argues that it's a very early 'version' of V0 (the early 'versions' weren't very formal, there was a continuous process of change/improvement going on, apparently). > It is also noted that the 45 class system (45/55/70/44) had "17th" > address bit - i.e. split I/D space. I believe that this is when "magic > numbers" were really introduced so that could be supported. No, they came in first for 'pure text' (0410): http://minnie.tuhs.org/cgi-bin/utree.pl?file=V4/nsys/ken/sys1.c which I would expect arrived to minimize swapping on machines with small amounts of real memmory. Support for user split-I/D (411) didn't arrive until Version 6: http://minnie.tuhs.org/cgi-bin/utree.pl?file=V6/usr/sys/ken/sys1.c although IIRC split I/D in the kernel was supported supported slightly before it was in user - although V5 didn't: http://minnie.tuhs.org/cgi-bin/utree.pl?file=V5/usr/sys/conf/mch.s so it couldn't have been much earlier than V6. Noel

8 years, 4 months

Unix & Memory Management Units (MMU)

by Erik E. Fair

Which version of Unix first ran on a computer with virtual addressing (address translation) so that a process with non-position independent code (PIC) can be loaded anywhere in RAM that the kernel decided to put it, and memory protection such that no process could accidentally or deliberately access RAM not allocated to it by the kernel (or a SIGSEGV would be delivered to it)? Put another way, when did Unix processes stop playing Core War with each other? (OK, so long as no more than one is resident at a time, they can't play Core War with each other, but there still needs to be a mechanism to protect the kernel from inadvertent (or advertent) pointer use). Which is to say, when did Unix run on (and properly use) computers with memory management units (MMU)? My guess from a quick look at the history of the DEC PDP-11 is that the target computer was likely a PDP-11/35 or PDP-11/40 with a KT11-D "memory management" module. One imagines that many pointer mistakes (bugs) in assembly or C were discovered and squashed in that version, modulo the historical unhappiness resulting from address zero containing a zero if dereferenced ("NULL pointers") in process address space. What year did that come about? By the time I got to Unix (2.8BSD on the Cory Hall DEC PDP-11/70), those features (virtual addresses, memory protection from the kernel) had apparently been part of Unix for a long time - certainly earlier than Version 6. This is distinct from demand-paged virtual memory which so far as I know was developed on the DEC VAX-11. curious, Erik <fair(a)netbsd.org>

8 years, 4 months

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TUHS