Re: [COFF] [TUHS] Unix on Zilog Z8000?

Moving to COFF On Tue, Jan 21, 2020 at 12:53 PM Jon Forrest &lt;nobozo(a)gmail.com&gt; wrote: A really good question. I will offer my opinion as someone that lived through the times. The two contemporary chips of that time were the Intel 8086 and Z8000. Certainly, between those two, the Zilog chip was a better chip from a software standpoint. The funny part was that Moto had been pushing the 6809 against those two. The story of the IBM/PC and Moto is infamous. Remember the 68K is a skunkworks project and is not something they were talking about it. Why IBM picked 8086/8088 over Z8000 I do not know. I'm >>guessing<< total system cost and maybe vendor preference. The tea, that developed the PC had been using the 8085 for another project, so the jump of vendors to Zilog would have been more difficult (Moto and IBM corporate had been tight for years, MECL was designed by Moto for IBM for the System 360). I do know they picked Intel over the 6809, even though they had the X-series device in Yorktown (just like we had it at Tektronix) and had wanted to use what would become the 68000. In the end, other than Forest's scheme, none of them could do VM without a lot of help. If I had not known about the X-series chip (or had been given a couple of them), I think Roger and I would have used the Z8000 for Magnolia. But I know Roger and I liked it better; as did most of our peeps in Tek Labs at the time. IIRC Our thinking was that Z8000 has an "almost" good enough instruction set, but since many of the processors's addressing modes are missing on some/most of the instructions, it makes writing a compiler more difficult (Bill Wulf used to describe this as an 'irregular' instruction set). And even though the address space was large, you still had to contend with a non-linear segmented address scheme. So I think once the 68000 came on the scene for real, it had the advantage if the best instructions set (all instructions worked as expected, was symmetric) and looked pretty darned near a PDP-11. The large linear address was a huge win and even though it was built as a 16-bit chip internally (i.e. 16-bit barrel shifter and needing 2 ticks for all 32-bit ops), all the registers were defined as 32-bits wide. I think we saw it as becoming a full 32-bit device the soonest and with the least issues.