Warren's 74LS593 Notes

12th April 2019, updated 15th April 2019

These are my notes which I've made after playing with a couple of 74LS593s on a breadboard. Hopefully these are useful if you are also considering using them. Please also have a look at my second set of notes where I manage to get the chip to work.

The 74LS593 is an 8-bit binary counter with an input register. It also has a carry in and carry out, and the counter's output is tri-state. This makes it ideal to be connected to an address bus where it can increment, output its value to the address bus and also load (jump to) a new value asserted by another device on the address bus.

The datasheets are confusing and, in some cases, wrong. I've tried to make some of the details a bit clearer here. Here are the links to the datasheets first:

• Texas Instruments 74LS593 datasheet
• SGS-Thompson 74HC593 datasheet

74LS593 DIP Pinout

G and G# Pin Purposes

G and G# control the output of the counter on to the left-hand pins A to H. The two datasheets differ in how these lines work and, after trying them out, it turns out that the SGS datasheet is wrong. In fact, both lines have to be set before the output is enabled:

G has to be high and G# has to be low to enable the output of the counter's value on pins A-H.

Counter Pin Purposes

These lines have no effect on the register.

When CCLR# is low, the counter is reset to zero. Otherwise, keep it high.

CCKEN and CCKEN# enable the counter to increment on a rising CCK edge.

Register Pin Purposes

The register comes before the counter, so you need to load the register first, then transfer the register into the counter.

The only time that the register is loaded from pins A to H is:

I would assume that you should set G and G# appropriately so that the counter's output is not enabled on pins A to H.

The CLOAD# Pin

This pin is confusing. The SGS-Thompson datasheet says that when CLOAD# is low the data of Q bus (i.e. pins A-H) are loaded into the counter. But the logic diagram in both datasheets shows that CLOAD# controls the loading of the counter from the register, not pins A to H.

Therefore, to get a new value into the counter (i.e. to load the PC), you would need to:

1. Set G and G# suitably to tri-state the counter output.
2. Lower RCKEN# and clock RCK to load from pins A-H into the register.
3. Raise RCKEN# to latch the register.
4. Lower CLOAD# to transfer the register value in to the counter.
5. Raise CLOAD# to latch the counter.
6. Reset both G and G# to re-enable the counter output on pins A to H.

And throughout this keep CCKEN and CCEN# low and high, respectively, to ensure the counter does not increment.

Cascading 74LS593 Chips

The TCO# pin goes low when the counter increments from 0xFF to 0x00. Therefore, if you need a 16-bit or larger counter, you can connect TCO# from the low-order 74LS593 to the CCKEN# pin of the next-order 74LS593.

Truth Table

I'm redrawing the truth table from the SGS-Thompson datasheet with the input pins in pin order, after playing with the chips on a breadboard.

Now have a look at my second set of notes where I manage to get the chip to work.