[TUHS] PDP-11 legacy, C, and modern architectures
krewat at kilonet.net
Wed Jun 27 08:33:37 AEST 2018
On 6/26/2018 6:20 PM, Bakul Shah wrote:
> it is becoming increasingly clear that
> caching (hidden memory to continue with the illusion of a simple memory
> model) itself is a potential security issue.
Then let's discuss why caching is the problem. If thread X reads memory
location A, why is thread Y able to access that cached value? Shouldn't
that cached value be associated with memory location A which I would
assume would be in a protected space that thread Y shouldn't be able to
I know the nuts and bolts of how this cache exploit works, that's not
what I'm asking.
What I'm asking is, why is cache accessible in the first place? Any
cache offset should have the same memory protection as the value it
represents. Isn't this the CPU manufacturer's fault?
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