When I started designing hardware at MIT in 1973 we had logic templates and drew on vellum with rapidograph pencils.

Copies were made, and the wire-wrapper would color each line as it was wired.

Sometime around 1974 the Architecture Machine Group acquired a CADD3 (IIRC) 2-D design system with its own minicomputer for which you could make 2D templates with connection points.  This thing was so hard to use that I went back to logic templates and rapidographs for my senior thesis project.

In the later ‘70s at PARC, Chuck Thacker had written SIL (Simple Illustrator) for the Alto, which is described in

SIL was easy to use, and easy to make new templates for, and it was used for all hardware designs at PARC.  There was a tool flow that extracted wirelists and component locations and would automatically drive the “Stitchweld” machine to make prototypes.  PC Boards I think were sent out to local Bay Area shops or possibly to Xerox El Segundo.

As usual, PARC operated in near ignorance of what the Labs were doing, but it seems that these 2D cad tools and automated tool flows were a fairly parallel evolution.

Later at Digital Western Research Lab there was yet another set of X windows based GUIs for logic, and associated simulators and wire list generators that the Digital research groups all used.  No doubt Digital main engineering had all sorts of CAD but it was VMS based and no one in research used it.

So it seems every group reinvented more or less the same suite of illustrators for logic design, with varying sets of tool flows.

I didn’t know that BTL won a big contract partly on the strengh of the Unix tools though! That is entirely proper and awesome.

Regarding IC Design, Carver Mead came to PARC for a while and collaborated with Lynn Conway.  We started with red, green, and blue colored pencils for NMOS, but soon after someone wrote an Alto based layout program to directly draw mask layers.  These were used for the first MOSIS runs.  Somewhere in the cellar I have my carry-save adder chip :)

-Larry