Any CPU with only a byte-wide memory interface (e.g. 8088) doesn't care about bigger word alignments. But yes, if the CPU can do 16 and 32 and 64 bits at a time, then aligned accesses of bigger words can be one transaction instead of two.

On 03/03/2025 03:00 PM, Paul Winalski wrote:
On Mon, Mar 3, 2025 at 1:28 PM Larry McVoy <lm@mcvoy.com> wrote:

Even x86, it would appear, wants to do aligned loads.  I'm a little
surprised by that though maybe I shouldn't be as there is a RISC
implemented by the microcode under the x86 CPU.

I don't think there's ever been a CPU design where unaligned accesses run at the same speed as naturally aligned accesses.  The worst case is an unaligned access that straddles a machine-word boundary.

-Paul W.